CAES UT54LVDS217 LVDS Serializer

The UT54LVDS217 Serializer converts 21 bits of CMOS/TTL data into three Low Voltage Differential Signaling (LVDS) data streams.

A phase-locked transmit clock is transmitted in parallel with the data streams over a fourth LVDS link. Every cycle of the transmit clock 21 bits of input data are sampled and transmitted.

Data rates per LVDS data channel of 525MBps are supported with a data through put of 1.575Gbps at a 75MHz clock frequency.

All pins support Cold Sparing and the UT54LVDS217 Serializer allows the use of wide, high speed TTL interfaces while reducing overall EMI and cable size.

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Key Tech Specs
  • Features:
  • 21-bit Serializer
  • 15 to 75 MHz shift clock support
  • Low power consumption
  • Power-down mode <216W (max)
  • Cold sparing all pins
  • Narrow bus reduces cable size and cost
  • Up to 1.575 Gbps throughput
  • Up to 197 Megabytes/sec bandwidth
  • 325 mV (typ) swing LVDS devices for low EMI
  • PLL requires no external components
  • Rising edge strobe
  • Compatible with ANSI/TIA/EIA 644-1996 LVDS Standard
  • Applications:
  • LVDS Communication Systems
  • Microprocessor and FPGA LVDS driver protection
  • Operational Environment
  • Temperature Range: -55ºC to +125ºC
  • Total Ionizing Dose: 1 Mrad (Si)
  • SEL Immune: ≤100 MeV-cm2/mg
  • Physical:
  • 48-Lead Flatpack
  • 25-mil Pitch
  • Power:
  • 2.0W (Maximum) 
  • Flight Grade:
  • QML-Q, QML-V
  • Export Control Classification Number (ECCN):
  • 9A515.e.2
  • SMD Number:
  • 5962-01534


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Key Tech Specs

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